Kamal Raj

Hardware Security Researcher

Innovating at the intersection of Hardware Security, and Cryptographic Engineering.

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About Me

I’m Kamal Raj, a Research Associate at Nanyang Technological University (NTU), Singapore, working in Prof. Anupam Chattopadhyay’s research group.

I specialize in hardware security, focusing on developing hardware accelerator architectures for Post-Quantum Cryptography (PQC) and designing side-channel attack countermeasures. My work aims to ensure that everything from tiny IoT sensors to massive cloud servers remains secure in a post-quantum era.

I hold an M.Tech. degree in VLSI from the Indian Institute of Technology Mandi (2023), where my research focused on optimizing the hardware footprint of the ASCON cipher and developing lightweight authentication protocols.

Originally from the Himalayan village of Nesang, I am driven by a passion to build a foundation of trust in the hardware that powers our digital world. When I’m not optimizing RTL, I enjoy capturing the world through my camera lens, trekking, or mentoring the next generation of hardware engineers.

Research Interests

Cryptographic Engineering

Efficient and secure hardware implementation of cryptographic algorithms for high-performance computing.

Side-Channel Attack Countermeasures

Developing novel hardware and software countermeasures against power, electromagnetic, and timing side-channel attacks.

Physical Unclonable Functions (PUFs)

Designing and analyzing PUFs for robust authentication, key generation, and anti-counterfeiting solutions.

Secure Processor Architecture

Architecting next-generation processors with built-in security features to protect against sophisticated threats like Spectre and Meltdown.

IoT & Embedded Systems Security

Creating lightweight and efficient security protocols for resource-constrained IoT and embedded devices.

Hardware Trojans

Detection and prevention of malicious modifications to Integrated Circuits throughout the design and supply chain.

Publications

Projects

HQC Hardware Implementation for Post-Quantum Cryptography

High-performance hardware implementation of the Hamming Quasi-Cyclic (HQC) code-based cryptosystem, optimized for NIST Post-Quantum Cryptography standardization.

ML-DSA Hardware Implementation with Masking

Side-channel attack resistant hardware implementation of the Module-Lattice-Based Digital Signature Algorithm (ML-DSA) featuring first-order masking countermeasures.

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PUF-based Lightweight Mutual Authentication for IoT

A lightweight mutual authentication and key agreement protocol using ASCON and Physically Unclonable Functions (PUF) to secure lightweight internet-connected devices.

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Life Outside The Lab

Hiking
Mountain Hiking

Exploring scenic trails and finding tranquility in nature. It's the perfect way to recharge and find new perspectives.

Photography
Photography

Capturing the beauty of the world, from the peaks of Kinnaur to the streets of Singapore.

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Mobile Gaming
Mobile Gaming

Leading a top-tier clan. It’s a masterclass in strategy, resource management, and digital leadership.

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Get In Touch

I'm always open to discussing new research, collaborations, or opportunities. Feel free to reach out.

kamal@kamalraj.in